The present invention relates to a technique for manufacturing a semiconductor integrated circuit device, and, more particularly, to a technique for exposing objects using a phase shift mask.
In the case of the next generation 65 nm node lithography, there is a demand for use of the ArF scanner which has been employed for the 90 nm node lithography. However, because the wiring length of the logic LSI for the 90 nm node lithography is about 100 to 120 nm and the K1 factor of R=K1×λ/NA for denoting resolution R is about 0.5, the requirement for the 90 nm node lithography can be satisfied using a weak super resolution technique, while a strong super resolution technique is indispensable to satisfy the requirements for the 65 nm node lithography, since the 65 nm node wiring length must be about 70 to 90 nm, whereby the K1 factor becomes about 0.35. And, to realize such a super resolution technique, a highly accurate mask structure is required. Particularly, for example, in the case of the Levenson phase mask, which is one example of the available phase shift masks, it is required to realize a complicated mask structure accurately.
A phase shifting technique that constitutes a super resolution technique is disclosed, for example, in the official gazette of JP-A No. 83032/1994, as well as in the official gazette of JP-A No. 230186/2001, which has been applied for by the present inventor et al. The official gazette of JP-A No. 83032/1994 describes a problem that arises when an electron beam drawing resist or silicon dioxide is used for a phase shift material of the phase shift masks. The problem is attenuation of an exposure beam caused by the transmission factor of the subject phase shifter. To solve this problem, two masks in which phase shifters are disposed and reversed in phase are prepared, and those phase shifters are overlaid one upon another for overlay exposure, whereby the exposure beam attenuation in those phase shifters is complemented (refer to the patent document 1).
And, the official gazette of JP-A No. 230186/2001 discloses a method for making a recess in a transparent mask substrate to form an object phase shifter (recessed phase shifter structure) that enables double exposure for the phase inversion pattern, thereby eliminating the influence of the beam attenuation that might occur in the recessed part, as well as a method for using an auxiliary pattern for each solitary pattern in a phase shift mask having both an area to which massed patterns are to be transferred and an area to which a solitary pattern is to be transferred (refer to the patent document 2).
[Patent document 1] Official gazette of JP-A No. 83032/1994
[Patent document 2] Official gazette of JP-A No. 230186/2001
However, in the case of a technique that prepares an auxiliary pattern for each solitary pattern in a phase shift mask having both a massed region to which massed patterns are to be transferred and a sparse region to which a solitary pattern is to be transferred, the present inventor et al have found that the following problems arise from the use of the technique.
More specifically, the number of pattern data items used for designing a phase shift mask increases because of the disposition of the auxiliary patterns. In addition, a DA (Design Automation) processing is required to dispose those auxiliary patterns. These become problems in the practical use of the technique. In the processes used for the manufacture of a semiconductor integrated circuit device, the number of patterns in each mask will increase more and more in the future, so that it will become important to determine how to reduce the number of pattern data items when designing each mask.